Such code (of course far more complicated e.g. due to multicore support) can be found in U-Boot bootloader (u-boot/arch/arm/cpu/armv7/nonsec_virt.S).
Fortunately for J6Eco DRA72x (and J6Entry - DRA71x) everything is already prepared and simple "SMC #1" call is enough to start hypervisor.
Example code:
.arch_extension sec
.arch_extension virt
.text
.align 2
.global start_hypervisor
.type start_hypervisor, function
start_hypervisor:
ldr r12, =0x102
ldr r0, =HYPERVISOR_ADDR
smc #1
References
- https://community.arm.com/processors/f/discussions/2842/is-there-sample-code-demo-how-to-switch-cpu-from-secure-state-to-non-sec-state
- http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438i/BABGIHHJ.html
- DRA72x_DRA71x-Technical Reference Manual.pdf
Brak komentarzy:
Prześlij komentarz